1. Technical Field
The present invention relates in general to designing and simulating digital devices, modules and systems in a distributed simulation environment, and in particular, to the declaration, compilation and use of trace arrays within a simulation model to store trace data of interest.
2. Description of the Related Art
Verifying the logical correctness of a digital design and debugging the design, if necessary, are very important steps in most digital design processes. Logic networks are tested either by actually building networks or by simulating networks on a computer. As logic networks become highly complex, it becomes necessary to simulate a design before the design is actually built. This is especially true when the design is implemented as an integrated circuit, since the fabrication of integrated circuits requires considerable time and correction of mistakes is quite costly. The goal of digital design simulation is the verification of the logical correctness of the design.
In a typical automated design process that is supported by a conventional electronic computer-aided design (ECAD) system, a designer enters a high-level description utilizing a hardware description language (HDL), such as VHDL, producing a representation of the various circuit blocks and their interconnections. The ECAD system compiles the design description into a format that is best suited for simulation. A simulator is then utilized to verify the logical correctness of the design prior to developing a circuit layout.
A simulator is typically a software tool that operates on a digital representation, or simulation model of a circuit, and a list of input stimuli representing inputs of the digital system. A simulator generates a numerical representation of the response of the circuit, which may then either be viewed on a display as a list of values or further interpreted, often by a separate software program, and presented on a display in graphical form. The simulator may be run either on a general-purpose computer or on another piece of electronic apparatus, typically attached to a general-purpose computer, specially designed for simulation. Simulators that run entirely in software on a general-purpose computer will hereinafter be referred to as “software simulators”. Simulators that are run with the assistance of specially designed electronic apparatus will hereinafter be referred to as “hardware simulators”.
Usually, software simulators perform a very large number of calculations and operate slowly from the user's point of view. In order to optimize performance, the format of the simulation model is designed for very efficient use by the simulator. Hardware simulators, by nature, require that the simulation model comprising the circuit description be communicated in a specially designed format. In either case, a translation from an HDL description to a simulation format, hereinafter referred to as a simulation executable model, is required.
It is frequently desirable for a simulation user to be able to analyze the results of a simulation run following completion of the simulation run. Accordingly, trace files containing events of interest detected during a simulation run are often constructed to permit a simulation user to review and analyze the simulation run. Such trace files may be built, for example, through the execution of a custom high-level language (e.g., C or C++) program that extracts signal values from the simulation model during simulation and stores the signal values within custom designed data structures.
The present invention recognizes that conventional techniques for constructing trace files tend to be labor intensive in that simulation users may be forced to construct custom programs and data structures to extract from the simulation model and store simulation data of interest. Moreover, conventional software techniques for building trace files tend to be computationally intensive during simulation, meaning that such conventional techniques degrade simulation performance, particularly for hardware simulators.
Accordingly, the present invention recognizes that it would be useful and desirable to provide improved methods, systems and program products for specifying and generating trace arrays and simulation trace files.